Reconfigurable Network on Chip Router Using Spatial Division Multiplexing Technique
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چکیده
Multi-Processor System-on-Chip (MPSoC) architectures have become a very attractive solution for the new consumer multimedia embedded market (Wolf 2004). Although MPSoCs promise to significantly improve the processing capabilities and versatility of embedded systems, one major problem in their current and future design is the effectiveness of the interconnection mechanisms between the internal components, as the amount of components grows with each new technological node. Bus-based designs are not able to cope with the heterogeneous and demanding communication requirements of MPSoCs (David Atienza 2008).
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